1. Field
Apparatuses consistent with example embodiments relate to a system on chip (SOC), and more particularly, to a SOC for performing skew calibration using both a rising edge and a falling edge of each of a clock signal and data.
2. Description of Related Art
Mobile phones, digital cameras, memory devices and so on transmitting a clock signal and data together using a serial interface may be implemented, and their sizes or power can be minimized compared to using a clock embedded serial interface. However, there is a limit to increasing a transmission speed due to skew between the clock signal and the data that is caused by an error occurring during the transmission. Recently, a transmission speed of at least 4 Gbps has been realized due to the development of skew calibration technology. However, as the transmission speed increases, duty distortion and signal distortion in the clock signal and the data are more influenced by a channel or chip processes.